
PIC16C62B/72A
1999 Microchip Technology Inc.
Preliminary
DS35008B-page 31
6.0
TIMER2 MODULE
The Timer2 module timer has the following features:
8-bit timer (TMR2 register)
- Readable and writable
8-bit period register (PR2)
- Readable and writable
Software programmable prescaler (1:1, 1:4, 1:16)
Software programmable postscaler (1:1 to 1:16)
Interrupt on match (TMR2 = PR2)
Timer2 can be used by SSP and CCP
Timer2 can be shut off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Figure 6-1 is a simplified block diagram of the Timer2
module.
Additional information on timer modules is available in
the
PICmicro
Mid-Range
Reference
Manual,
(DS33023).
FIGURE 6-1:
TIMER2 BLOCK DIAGRAM
REGISTER 6-1:T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h)
Comparator
TMR2
Sets flag
TMR2 reg
output (1)
Reset
Postscaler
Prescaler
PR2 reg
2
FOSC/4
1:1
1:16
1:1, 1:4, 1:16
EQ
4
bit TMR2IF
Note 1: TMR2 register output can be software selected
by the SSP Module as a baud clock.
to
U-0
R/W-0
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
TMR2ON
T2CKPS1 T2CKPS0
R
= Readable bit
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7
bit0
bit 7:
Unimplemented: Read as '0'
bit 6-3:
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000
= 1:1 Postscale
0001
= 1:2 Postscale
0010
= 1:3 Postscale
1111
= 1:16 Postscale
bit 2:
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
bit 1-0:
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00
= Prescaler is 1
01
= Prescaler is 4
1x
= Prescaler is 16